Dayton Area Graduate Studies Institute

DAGSI 699   Multidisciplinary and Collaborative Design for Systems on a Chip

4 Credits, Winter Quarter 2003, 4:00-6:00  (M, W)  

(Interactive Video Network course) 

CEG 790   Collaborative Design for Systems on a Chip


Table of Contents

  1. Catalog Description
  2. Course Material
  3. Course Coordinators
  4. Principal Instructors
  5. Prerequisites by Topics
  6. Topical Outline
  7. Computer Usage
  8. Laboratory Projects
  9. Lectures (in Powerpoint)
  10. Homework Assignments
  11. Course Management

Catalog Description

Soon it is estimated that circuits will have a complexity of about 150 million transistors and require perhaps over 1,000 design engineers. So technology is in need of collaborative design, since it is not realistic to have available thousands of designers at the same location. Likewise, another paradigm of design for systems on a chip is that multidisciplinary skills are required. Thus, this course aims to develop an understanding of  Micro/Macro collaboration along with the  ability to apply and use multidisciplinary skills for the design of a system on a chip.


Course Material

  1. Mark Richards, Anthony Gradient, and Geoffrey Frank, “Rapid Prototyping of Application Specific Signal Processors”, Kluwer Academic Publishers, 1998.

  2. Lecture Notes and Presentations available from the course web-page.

Course Coordinators (* = Main)

 Dr.  Hoda S. Abdel-Aty-Zohdy*
 Microelectronics System Design Laboratory
 Department of Electrical and Systems Engineering
 Oakland University, Rochester, MI 48309
 Email: zohdyhsa@oakland.edu

Prof. Carla Purdy*                            
Electronic Design Automation Research Center   
Department  of Electrical & Computer /engineering and Computer Science
University of Cincinnati, Cincinnati, OH 45221-0030                     
Phone No. : (513)-556-1810 Email: Carla.Purdy@uc.edu|

Dr. Harold Carter, Professor of Electrical and Computer Engr. (UC)
Email : Hal.Carter@uc.edu

Dr. Robert Ewing, Adjunct Professor (AFIT), AFRL/IFTA
Email : Robert.Ewing@wpafb.af.mil
Principal Instructors and Instituitional Contacts

Prerequisites by Topics


Topical Outline

Week Day Hour Topic Instructor Resource
1 M 6 Jan 4-5 Top-Down Design Abdel-Aty-Zohdy  
    Lab VHDL Purdy  
  W 8 Jan 4-5 RASSP Design & Project Topics Ewing  
    5-6 VHDL Design Purdy  
2 M 13 Jan 4-5 SOC's Design Ewing  
    Lab Project Description/Goals Carter  
  W 15 Jan 4-5 SOC's Design Ewing  
    5-6 Project Description/Goals, Team Organization Abdel-Aty-Zohdy, Purdy  
  M 20 Jan   Holiday – Martin Luther King Day    
  W 22 Jan 4-5 SOC Design Process Overview, AMS Tools Carter  
  M 27 Jan 4-5 Genetic Algorithms & Modelling Purdy  
  W 29 Jan 4-5 MEMS Kladitis  
  M 3 Feb 4-5 MEMS Kladitis  
  W 5 Feb 4-5 Bio-Inspired Processing Abdel-Aty-Zohdy  
  M 10 Feb 4-5 Chemical Sensor FPGA Implementation Esslinger  
    Lab Project Reviews Purdy  
  W 12 Feb 4-5 Wavelets Zheng  
  M 17 Feb 4-5 Acoustics - Hearing Scarpino  
  W 19 Feb 4-5 Testability and Design-for-Test (DFT) Wen-Ben Jone  
  M 24 Feb 4-5 No Class -  Holiday- Work on Projects Quinn  
  W 26 Feb 4-5 No Class - Holiday- Work on Projects Quinn  
  M 3 Mar 4-5 Testability and Design-for-Test (DFT) / Project Reviews Wen-Ben Jone  
  W 5 Mar 4-5 Biological Data Modeling Quinn  
  M 10 Mar 4-5 Genomes, Proteins, and Prediction Quinn  
  W 12 Mar 4-5 Class Projects/Review for UC & OU    
  M 17 Mar 4-5 Chemical sensor & Modeling Language Esslinger, Mills  
  W 19 Mar 4-5 FPGAs Emmert  
  M 24 Mar 4-5 Project Presentations Abdel-Aty-Zohdy, Purdy  
           

Computer Usage


Laboratory Projects


Lectures and Other Related Links

  1.  8-Jan-2003;   UML-SOC ;  RASSP-System-Level-Design
  2.  soc_jan03_vhdllec; Lecture_13Jan03_reduced
  3. Hearing-Aid-SOC ; AIC-Hearing-Aids
  4. Bio-medical devices lectures
  5. Design and Reuse ; TRAC - Totally Reconfigurable Analog Circuit
  6. Bio-description Language ; BioSoC
  7. Analog and Digital SOC
  8. Bio-Inspired Processing Bibliography
     

Student Presentations

  1. Optimum Microwave OP-Amp using Comparator Stages
  2. Digital Processing of Optical Stored Information in Protein-Based Media
  3. Skip-Block Cell for ROI CMOS Readout Image Sensor
  4. Digital Implementation of Genetic Algorithm Chip Using HSAC Algorithm

Homework Assignments


Course Management

Estimated ABET Category Content


T. K. Prasad   (03/11/03 03:27:05 PM )