VHDL-93 Parser/Pretty-Printer in SWI_Prolog


This directory contains the distribution for a VHDL (IEEE 1076-1993) parser and pretty-printer in SWI-Prolog(Version 2.9). It evolved from the VHDL-87 Parser in Quintus Prolog written by Peter B. Reintjes.

This distribution includes a number of HTML files with embedded Prolog source code, a small filter program "Make.java", a "data" directory with seven sample VHDL-87 files, and a "test_data" directory with six VHDL-93 files. The VHDL-93 formatter produces a readable text file from the parse tree representing a VHDL-93 design.

To compile and test the parser: % javac Make.java; java Make

To delete only generated prolog files: % java Make clean

To delete all generated files (incl. parser/classes): % java Make clean_all

To browse the parser design document: % netscape main.html

To extract the tutorial example: % java Make tutorial.html

This tutorial will take you step by step through the process of writing and executing simple queries about the VHDL-93 designs read in by the parser.

To read an arbitrary VHDL-93 file (e.g. "mine.vhdl"):

        % vhdl93_parser
        ?- vhdl_read(mine).
        ?- listing(design_unit).
           .
           .
           .
Prasad 
Krishnaprasad Thirunarayan

Last modified: Fri Sep 19 12:06:21 EDT